It's not much about the processing time of the PRU, it is more about the time it takes for the SPI peripheral to clock the bits down the wire.
Right now, the inner loop runs at 88.2kHz (timed by the McASP left/right channels) and does 4 SPI transactions, which take about
$8\mu s$ out of the
$11\mu s$ available in the loop (we have had this conversation elsewhere).
Having different sampling rates for different analog inputs is made difficult by the fact that the ADC chip requires to receive data with the channel number to convert 2 sampling cycles before you can read it, so for instance, the PRU does the following (if I remember correctly):
cycle 0: PRU receiving reading of channel 0, ADC converting channel 1, PRU requesting conversion of channel 2
cycle 1: PRU receiving reading of channel 1, ADC converting channel 2, PRU requesting conversion of channel 3
cycle 2: PRU receiving reading of channel 2, ADC converting channel 3, PRU requesting conversion of channel 4
You can see that, while iterating through a number of channels ( be it 2, 4 or 8) with a constant sampling rate is pretty straightforward, accommodating for different sampling rates would be much more complicated.