Why? My recommendation would be to power it from the Percussa's 3.3V line (4mA shouldn't really be a lot!)
Because of the tri-state behaviour of I2C lines, you would then need an I2C-specific level shifter.
thetechnobear does this mean that trill will attempt to put a 5v signal on the SDL.
The datasheet (table 14) states the HIGH voltage out will will range between Vdd-0.2V (Voh3, when driving a high-impedance input, with 10µA of output current) to Vdd-0.9V (Voh4, when reaching the max out current of 5mA). Input "high" voltage on Trill is 2V.
During pure I2C communication, both master and slave never output a high voltage: they either drive a strong low or go high impedance (which is why there are pull-up resistors on the bus). In principle, this would allow you to use a pullup to 3.3V and not even need a level shifter. However, the CY8C20XX6A datasheet further says
On power-up, the SDA(P1[0]) drives a strong high for 256 sleep clock cycles and drives resistive low for the next 256 sleep clock cycles. The SCL(P1[1]) line drives resistive low for 512 sleep clock cycles and both the pins transition to high impedance state. On reset, after XRES de-asserts, the SDA and the SCL lines drive resistive low for 8 sleep clock cycles and transition to high impedance state. Hence, during power-up or reset event, P1[1] and P1[0] may disturb the I2C bus. Use alternate pins if you encounter issues.
So if Trill is powered from 5V, you will have somewhere between 4.1V(at 5mA) to 4.8V(at 10µA) driven on SDA at power on. There is a 5mA current limiter on the Cypress pin and a small series resistor, yet it may well be enough to fry your Percussa.
You should first verify the input characteristics of the Percussa's input pins. If they are 5V tolerant, you are sorted. Alternatively, if the Percussa's pins are capable of sinking enough current, you may also be fine without further measures. 5mA is the specified maximum on the Cypress part, but I wouldn't necessarily trust it (i.e.: allow for some tolerance), also if you are planning on connecting n
Trills in parallel, these 5mA will be multiplied by n
and they may quickly exceed the Percussa's sinking capability.
The first attempt could be to power off 5V and add a safety current-limiting resistor in series with SDA and SCL (Again, SCL shouldn't be driven high by the Cypress chip, but why risk it?). You'll want this large enough that at the max current output of the Cypress chip (5mA), the dropout from 5V is enough to guarantee both a safe tension and safe current for the Percussa and small enough compared to the pull-ups so that it doesn't affect the logical level on either device (you should do some maths with the pullup resistors). I guess 330 ohm is the minimum value (1.65V dropout at 5mA, though again as Voh4 would be 4.1V, it may be OK to go a bit lower). I would recommend starting a bit higher (e.g.: 680?) and come down to 330. Again, you may have to be wary of what happens when adding more Trills in parallel.
If the above doesn't work (because of the interaction between the series resistor and the pullups) and you still want to use the 5V line, I'd recommend some sort of "regulator" to get your 3.3V supply from 5V. A low-current LDO regulator would be best, but some more fun options could also work, e.g.:
- a zener + resistor
- 2 silicon diodes in series with 5V (1.4V dropout gives you 3.6V).
- even perhaps a single, well-chosen resistor in series with the 5V supply line could be enough. Not sure if this would worsen the noise performance of the cap sensing. You'd pick a resistor through which a 4mA current would cause approximately a 1.7V drop, e.g.: 420 ohm. Possibly add a capacitor in parallel with the load (Trill).